Summary

 Design Name  ZXVGA
 Fitting Status  Successful
 Software Version  J.40
 Device Used  XC95144XL-10-TQ100
 Date   1-30-2011, 9:18PM

RESOURCES SUMMARY
Macrocells Used Pterms Used Registers Used Pins Used Function Block Inputs Used
106/144  (74%) 298/720  (42%) 80/144  (56%) 44/81  (55%) 192/432  (45%)

PIN RESOURCES
Signal Type Required Mapped
 Input  5  5
 Output  29  29
 Bidirectional  8  8
 GCK  2  2
 GTS  0  0
 GSR  0  0
 DGE  0  0
Pin Type Used Total
 I/O   42  74
 GCK/IO  2  3
 GTS/IO  0  4
 GSR/IO  0  1

GLOBAL RESOURCES
 Signal mapped onto global clock net (GCK1)  VGA_CLK
 Signal mapped onto global clock net (GCK2)  ZX_CLK

POWER DATA
 Macrocells in high performance mode (MCHP)  106
 Macrocells in low power mode (MCLP)  0
 Total macrocells used (MC)  106